Providing an efficient programmable logic device and method is vital with the electronics industry and all related industries.
This invention relates to a logic device and method that can be efficiently configured. In particular, the device is operable with fast and powerful microprocessors, thereby enhancing speed and reducing size in electronic applications. Also, the central logic of the cellular array is amenable to desktop processor implementation.
As microprocessors have become faster, circular logic timing has become critical. At the same time, the more information and logic that can be stored on a silicon chip constituting a memory device, the more beneficial is that device to the semiconductor industry.
The invention is directed to a universal cellular array based on a state table method to logically program such cellular array.
Prior art of programmable logic devices are based on Gate array technology. Such technology requires a desired function to be broken into its basic parts such that an end result function is described in terms of a number of latches, shift registers, MUXS, counters and Medium Scale Integration (MSI) building blocks. The construction of MSI building blocks is decided with proximity to I/O buffers and their construction and placement determines the efficiency of the chip. The requirement of MSI building blocks for a typical sequential logic function is generally disadvantageous.
There is the need to provide a different programmable logic device which implements a cellular array, having the advantage of a more replicable circuit design.